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trustzone translation table

yaoyao wang
Note: This was originally posted on 15th November 2011 at http://forums.arm.com

After reading the documents in the website, i am quite puzzled about the trustzone feature.
1. Can i disable trustzone extension?
2. Each world has its own virtual processor, virtual mmu and translation table. How to make sure that the normal world can't access the secure world memory? The normal world can't see the physical address of the secure world? Or it can translate the virtual address to the physical address of the secure world, but it can't access that region of memory?
3. Normal world ignores the NS bit in the translation table. So it can access all the physical memory in normal world?
I have read the book: ARM Security Technology: Building a Secure System Using TrustZone Technology, ARM Architecure Reference Manual and ARM Cortex-A programming guide. Did i miss the important part? Can anyone advise me some books regarding the arm cortex-a architecture? I am a beginner at ARM. Thanks.
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  • Arm Employee Badge
    Note: This was originally posted on 15th November 2011 at http://forums.arm.com

    1) Yes.  The two worlds each have their own copies of the TTBR{n} registers.  When you're in the Secure world, you see/use the secure copy.  When in the Normal world, you see/use the non-secure copy.

    2) The Normal world can NEVER generate a secure access.  What this means in practise is any bus access (or cache look up) will be marked as non-secure.  It is up to the memory system to use that information to prevent non-secure accesses to secure memory.

    3) I am not sure what you mean by "constructing the translation table" :-(
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  • Arm Employee Badge
    Note: This was originally posted on 15th November 2011 at http://forums.arm.com

    1) Yes.  The two worlds each have their own copies of the TTBR{n} registers.  When you're in the Secure world, you see/use the secure copy.  When in the Normal world, you see/use the non-secure copy.

    2) The Normal world can NEVER generate a secure access.  What this means in practise is any bus access (or cache look up) will be marked as non-secure.  It is up to the memory system to use that information to prevent non-secure accesses to secure memory.

    3) I am not sure what you mean by "constructing the translation table" :-(
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