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Is RTSM A9 uart interrupt ok?
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Is RTSM A9 uart interrupt ok?
liang hua
over 12 years ago
Note: This was originally posted on 15th August 2011 at
http://forums.arm.com
I run sample code 'SW012-SW-00000-r1p0-00rel0.zip' on RTSM CortexMPCore, uart interrupt does not generate after inputs a command.
The sample code has a uart console. Uart input is processed in interrupt. First command input is ok, but after that, input is hung up.
If not using uart interrput, input and output is ok.
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liang hua
over 12 years ago
Note: This was originally posted on 22nd August 2011 at
http://forums.arm.com
Hi ttfn,
Thanks for your hint.
But only enable FIFO can not work. Need more changes. Below is my solution.
1. Enable FIFO and set interrupt mask to receive timeout.
serial_init(CONSOLE, 38400, UART_PL011_LCRH_WLEN_8|UART_PL011_LCRH_FEN, UART_PL011_IMSC_RTIM);
2. Modify cli_uart_handler,
[s] if (read32(UART_BASE + UART_PL01x_FR) & UART_PL01x_FR_RXFF) //RXFF is not handled correctly in SystemBench
[/s]
if ((read32(UART_BASE + UART_PL01x_FR)&UART_PL01x_FR_RXFE) == 0)
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liang hua
over 12 years ago
Note: This was originally posted on 22nd August 2011 at
http://forums.arm.com
Hi ttfn,
Thanks for your hint.
But only enable FIFO can not work. Need more changes. Below is my solution.
1. Enable FIFO and set interrupt mask to receive timeout.
serial_init(CONSOLE, 38400, UART_PL011_LCRH_WLEN_8|UART_PL011_LCRH_FEN, UART_PL011_IMSC_RTIM);
2. Modify cli_uart_handler,
[s] if (read32(UART_BASE + UART_PL01x_FR) & UART_PL01x_FR_RXFF) //RXFF is not handled correctly in SystemBench
[/s]
if ((read32(UART_BASE + UART_PL01x_FR)&UART_PL01x_FR_RXFE) == 0)
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