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Thumb mode, Thumb2 MRS insturction issue.

Kim DonaSam
Note: This was originally posted on 28th July 2011 at http://forums.arm.com

Dear All

I have find a strange behavior on cortexA9/R4,

My mode data code as below 

0x0   0x8100F3EF    MRS R1,CPSR                 (current CPSR value is 0x1F3)

However when I execute the line,  the value in R1 is 0x1D3,   Isn't it should be 0x1F3?

Is it a chip bug? or there is some other reason?

If anyone knows the answer, please let me know.
Parents
  • Note: This was originally posted on 2nd August 2011 at http://forums.arm.com

    Hi again,

    I think the solution is with software interrupt (also called "system call") :
    - add a dedicated entry in your intvecs table :

         b   _c_int00
    undefEntry
         b   undefEntry
    svcEntry
         b   ISR_SWI      ;  SOFTWARE INTERRUPT
    ...

    - that you can call with :
    svc 0x01


    - and which contains something like :
    ISR_SWI
    ; here, cpsr is copied into spsr_svc
    mrs    r1,spsr
    movs pc, lr         ; Return

    Regards

    Christophe
Reply
  • Note: This was originally posted on 2nd August 2011 at http://forums.arm.com

    Hi again,

    I think the solution is with software interrupt (also called "system call") :
    - add a dedicated entry in your intvecs table :

         b   _c_int00
    undefEntry
         b   undefEntry
    svcEntry
         b   ISR_SWI      ;  SOFTWARE INTERRUPT
    ...

    - that you can call with :
    svc 0x01


    - and which contains something like :
    ISR_SWI
    ; here, cpsr is copied into spsr_svc
    mrs    r1,spsr
    movs pc, lr         ; Return

    Regards

    Christophe
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