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Cortex-R4F : need explanations about some PMU events

Note: This was originally posted on 29th July 2011 at http://forums.arm.com

Hello,

I am using a Cortex-R4F (TMS570), and I used PMU to count the number of "Instruction architecturally executed" and "Dual-issued pair of instructions architecturally executed" (§6.1 of DDI0363E) in order to benchmark that component, and I get a strange result : I built a test code with 4096 instructions (in fact, a little bit more before and after the PMU is started/stopped), and I obtained :
- in ARM mode :
     3083 Instruction architecturally executed
     2048 Dual-issued pair of instructions architecturally executed

- in Thumb mode :
     4015 Instruction architecturally executed
     2048 Dual-issued pair of instructions architecturally executed

Please, could someone explain why the number of Instruction architecturally executed is not the same in both modes ?
And more important for me : how can I count the real number of instructions of any code ?

Thanks a lot

Best regards

Christophe

Christophe Beausoleil over 12 years ago

Note: This was originally posted on 20th February 2012 at http://forums.arm.com

Hi all,

Does someone have an idea ? I really can not figure out why the PMU count is wrong...

Thanks a lot

Best regards

Christophe
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Christophe Beausoleil over 12 years ago

Note: This was originally posted on 22nd February 2012 at http://forums.arm.com

Thanks for your answer. I am sorry, I realize I was indistinct...

Of course, my test code is written in assembler :
movs r0, #1
nop
movs r1, #2
nop
movs r2, #3
nop
...

preceded with a strict directive for compiling in ARM or Thumb mode.

Best regards

Christophe
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Martin Weidmann over 12 years ago

Note: This was originally posted on 20th February 2012 at http://forums.arm.com

You said that it should be 4096, how do you know this? What are you writing the code in? C will typically compile to more Thumb instructions than ARM instructions*, so what you've seen isn't necessarily wrong.

* There are cases where ARM instructions are more flexible than Thumb instructions. So the compiler can use one ARM instr or two Thumb instrs. This is less common with Thumb-2, but there are still some instances.
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