Hi All,
When I was debugging arm926ej-s using DS-5, DS-5 stoped as soon as enable MMU and output CMD440-COR182-TAD23-NAL29.
What mean is it?
It means a command that went through the core of DS-5, specifically the target access part, caused an error.
The error code means nothing to customers, what you need is the context around what you tried to do.
Ta,
Matt
Hi Matt Sealey,
Thank your reply. We were debugging our asic with arm926ej-s core. Bootrom of asic only enabled ICache, then startup a SPL in SRAM. The SPL would load a program to 0x00000000 from nor flash, go to 0x00000000 address and start to run. The program configured page table, invalid ICache, drain write buffer and enabled MMU. The error occured as invoke mmu instruction, mcr p15, 0, r0, c1, c0, 0, DS-5 outputed the following message:
ERROR(CMD440-COR182-TAD23-NAL29):
!Stepping failed
!Failed to step instruction at 0xxxxxxx
!Unable to step device ARM926EJ-S
!Failed to set breakpoint.
What's wrong with our configuration?
There are two possibilities:
1) enabling the MMU changes the virtual/physical address the core is running at
2) enabling the MMU changes the permissions at the virtual address the core is running at
the second is most likely but be aware of the first.
if your MMU setup marks the range where you're trying to step as read-only you can't set a breakpoint there anymore, which is how pre-v8 cores handle stepping.
try before you start stepping:
memory 0xXXXXXX +0xYYY ro,nobp,hbp
Where the two numbers are the start and length of the read-only range. Generally it is advised that stepping into MMU enable isn't really possible (because the debugger is executing instructions via the core in the core's context and it changes).
You could set a breakpoint (hardware based if it's read only memory) past the MMU enable and run through it, though.
Hi Matt,
Thank your suggestion. The issue was fixed.