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AXI 3/AXI 4 Exclusive Access

Sai Karthik Madabhushi
Note: This was originally posted on 14th June 2011 at http://forums.arm.com

Hi,

I have a query  regarding Exclusive Access in AXI 3/ AXI 4. The spec does NOT say anything about this behavior, hence I need a clarification.

1. Can there be two Exclusive Reads monitoring the same address region?

   ARID = 0    ARADDR = 0x004   ARSIZE = 0   ARLEN = 2
   ARID = 3    ARADDR = 0x004   ARSIZE = 1   ARLEN = 1

** Lets assume the above ID's have come sequentially in subsequent cycles and NO exclusive write has come.

2. If YES, then How should the behavior of Exclusive Write be?
a. Exclusive Write of which ID should be entertained?
        b. Should we stop monitoring the OTHER ID when the exclusive write for ONE ID arrives?

3. In case of a successful Exclusive Write, is there a compulsion for the slave to send EXOKAY?
    a. Can it also send SLVERR, or DECERR?

Regards,
Sai Karthik
Parents
  • Note: This was originally posted on 15th June 2011 at http://forums.arm.com


    1. The slave MUST send an EXOKAY response

    The slave will only send EXOKAY, if the transfer succeeded to indicate
    • The slave actually supports exclusive access
    • An exclusive write access has updated memory

    Is there a chance that the slave can also send SLVERR response, due to ANY internal condition.
    2. Is it a protocol violation if the slave sends SLVERR instead of EXOKAY?

    Indeed, the spec is not explicit and I see why there might be a doubt. My understanding is that the error responses SLVERR and DECERR may be returned for any transaction, both read and write. Otherwise we'd have to issue a normal access (r/w) to a semaphore first, to verify whether there isn't any error, followed by an exclusive read.

    Kindly
    Marcus
Reply
  • Note: This was originally posted on 15th June 2011 at http://forums.arm.com


    1. The slave MUST send an EXOKAY response

    The slave will only send EXOKAY, if the transfer succeeded to indicate
    • The slave actually supports exclusive access
    • An exclusive write access has updated memory

    Is there a chance that the slave can also send SLVERR response, due to ANY internal condition.
    2. Is it a protocol violation if the slave sends SLVERR instead of EXOKAY?

    Indeed, the spec is not explicit and I see why there might be a doubt. My understanding is that the error responses SLVERR and DECERR may be returned for any transaction, both read and write. Otherwise we'd have to issue a normal access (r/w) to a semaphore first, to verify whether there isn't any error, followed by an exclusive read.

    Kindly
    Marcus
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