This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

RAM in Code memory area

Note: This was originally posted on 20th June 2011 at http://forums.arm.com

Hi,

My board has 32K SRAM in the code memory area (within the first 0.5G), also has the same size of build in SRAM in data area.  My question is, what kind of data are suitable to put in CODE area?  Particularly, should I set the main stack in CODE SRAM or DATA SRAM?

Thanks in advance.
Parents
  • Note: This was originally posted on 22nd June 2011 at http://forums.arm.com


    I guess you are using a NXP Cortex-M3 microcontroller? (Please be more specific on device type)

    If that is the case, to get the best performance (program execution as well as interrupt latency), the stack should be place in the SRAM in the SRAM region. This allows stack operations and program fetches to take place at the same time.



    Yes, your guess is perfectly right!  I am using NXP17cxx board.  For the board, 50% SRAM are arranged in CODE region, another half are in SRAM region.  I also have the same thinking about placing the stack on SRAM rather than CODE.  But what kind of data (with r/w accessing) are suitable to be placed in CODE region?  It's not affordable of not using the 50% of the total SRAM space.

    Looking forward for you answer.

    Best Regards,
    narke

Reply
  • Note: This was originally posted on 22nd June 2011 at http://forums.arm.com


    I guess you are using a NXP Cortex-M3 microcontroller? (Please be more specific on device type)

    If that is the case, to get the best performance (program execution as well as interrupt latency), the stack should be place in the SRAM in the SRAM region. This allows stack operations and program fetches to take place at the same time.



    Yes, your guess is perfectly right!  I am using NXP17cxx board.  For the board, 50% SRAM are arranged in CODE region, another half are in SRAM region.  I also have the same thinking about placing the stack on SRAM rather than CODE.  But what kind of data (with r/w accessing) are suitable to be placed in CODE region?  It's not affordable of not using the 50% of the total SRAM space.

    Looking forward for you answer.

    Best Regards,
    narke

Children
No data