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VBIC.I8 I64 or F32

Etienne SOBOLE
  • Note: This was originally posted on 13th June 2011 at http://forums.arm.com


    I'm afraid there isn't one.  The actual available 64-bit immediates available for VBIC are the first six rows of Table A7-15 Modified immediate values for Advanced SIMD instructions (ARM ARM).

    For VBIC.I8 I think the only available immediate is #0 (which is not useful).  For I64 you could have:


      VBIC.I64 d0, #0x000000ab000000ab
      VBIC.I64 d0, #0x0000ab000000ab00
      VBIC.I64 d0, #0x00ab000000ab0000
      VBIC.I64 d0, #0xab000000ab000000
      VBIC.I64 d0, #0x00ab00ab00ab00ab
      VBIC.I64 d0, #0xab00ab00ab00ab00

    VBIC.F32 is just a synonym for VBIC.I32.

    Once you find a valid pseudo instruction, you can find out what it expands into by assembling and disassembling it.

    In order to accomplish, VBIC.I8 d0, #0x83 you'll need to do something like:


      VMOV.I8 d1, #0x83 ; does exist
      VBIC    d0, d0, d1




    Hum!!!
    Ok thank's

    I though that when we speak about "pseudo instruction" we used to speak about a single instruction. not a code.

    In this case, we can find pseudo instruction for almost all instruction dans all size of lane :)
  • Note: This was originally posted on 15th June 2011 at http://forums.arm.com


    you can't assemble VBIC.U16 d0, #0x8686


    Well. My beagleboard is back :)

    I've just check and gcc do not assemble
    vbic.i8
    or
    vbic.i64

    those instruction do not exists, and there is no pseudo instruction for them.
  • Arm Employee Badge
    Note: This was originally posted on 13th June 2011 at http://forums.arm.com


    What is the pseudo instruction that will make a

    VBIC.I8 d0, #0x83
    and perfom 8 8-bit bit clear operations on each 8-bit values of the register???

    Same question for VBIC.I64 and VBIC.F32?


    I'm afraid there isn't one.  The actual available 64-bit immediates available for VBIC are the first six rows of Table A7-15 Modified immediate values for Advanced SIMD instructions (ARM ARM).

    For VBIC.I8 I think the only available immediate is #0 (which is not useful).  For I64 you could have:


      VBIC.I64 d0, #0x000000ab000000ab
      VBIC.I64 d0, #0x0000ab000000ab00
      VBIC.I64 d0, #0x00ab000000ab0000
      VBIC.I64 d0, #0xab000000ab000000
      VBIC.I64 d0, #0x00ab00ab00ab00ab
      VBIC.I64 d0, #0xab00ab00ab00ab00

    VBIC.F32 is just a synonym for VBIC.I32.

    Once you find a valid pseudo instruction, you can find out what it expands into by assembling and disassembling it.

    In order to accomplish, VBIC.I8 d0, #0x83 you'll need to do something like:


      VMOV.I8 d1, #0x83 ; does exist
      VBIC    d0, d0, d1
  • Arm Employee Badge
    Note: This was originally posted on 14th June 2011 at http://forums.arm.com

    ARM's use of "pseudo instruction" is something which looks like an instruction for assembler purposes, but which cannot be represented as a real machine code instruction.

    The common example from "normal ARM" instructions is the arbitrary load:


    LDR, r0, =0x12345678


    This will compile down to a MOV if the immediate fits in the MOV instruction, or a LDR from literal pool if it doesn't.

    Iso