• Locked Locked
  • Replies 4 replies
  • Subscribers 119 subscribers
  • Views 6343 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Boot ROM Question of NXP LPC17xx

Woody Wu
Note: This was originally posted on 9th June 2011 at http://forums.arm.com

Hi,

I am about to use LPC17xx to do some work. But I don't quite understand
it's boot ROM remapping.  According to ARMv7 architecture manual, the
first vector entry (address 0x00 to 0x03) should be value of SP and the
second entry (address 0x04 to 0x07) should be reset entry (the starting
point of the user program). On the other hand, the LPC17xx manual said
that at boot time, a portion of the 8K boot ROM is temporarily remapped
to address 0x00000000.  So I was wondering, what are the values in the
first 16 bytes in boot ROM? And, how a user program is finally get
executed? Where is my stack top?

Thanks in advance if you can give me some clues.

-
narke
Parents
  • Arm Employee Badge
    Note: This was originally posted on 9th June 2011 at http://forums.arm.com

    Hi Narke,

    Regarding (1):
    The flash memory in LPC17xx can be programmed using serial communication with
    some flash programming firmware (in the boot loader) running.
    See chapter 32 of User manual (http://www.nxp.com/documents/user_manual/UM10360.pdf)
    An example method of using this flash programming mechanism is flash magic (http://www.flashmagictool.com/).

    The boot loader also check if the flash is programmed before running the program in flash.
    This is done by detecting a checksum. (See 32.3.1.1 of the LPC17xx User manual)

    Regarding (2):
    Yes, please see "32.4 Boot process flowchart" in the user manual, and section 32.3:
    "The flash boot loader code is executed every time the part is powered on or reset. The
    loader can execute the ISP command handler or the user application code. A LOW level
    after reset at pin P2.10 is considered an external hardware request to start the ISP
    command handler."

    So when you design your circuit, make sure P2.10 is not low when it startup.
    (Best to put a jumper or DIP switch so you can control it for debug purpose.)

    regards,
    Joseph
Reply
  • Arm Employee Badge
    Note: This was originally posted on 9th June 2011 at http://forums.arm.com

    Hi Narke,

    Regarding (1):
    The flash memory in LPC17xx can be programmed using serial communication with
    some flash programming firmware (in the boot loader) running.
    See chapter 32 of User manual (http://www.nxp.com/documents/user_manual/UM10360.pdf)
    An example method of using this flash programming mechanism is flash magic (http://www.flashmagictool.com/).

    The boot loader also check if the flash is programmed before running the program in flash.
    This is done by detecting a checksum. (See 32.3.1.1 of the LPC17xx User manual)

    Regarding (2):
    Yes, please see "32.4 Boot process flowchart" in the user manual, and section 32.3:
    "The flash boot loader code is executed every time the part is powered on or reset. The
    loader can execute the ISP command handler or the user application code. A LOW level
    after reset at pin P2.10 is considered an external hardware request to start the ISP
    command handler."

    So when you design your circuit, make sure P2.10 is not low when it startup.
    (Best to put a jumper or DIP switch so you can control it for debug purpose.)

    regards,
    Joseph
Children
No data