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Cortex-M3 Memory management fault recovery

Note: This was originally posted on 2nd June 2011 at http://forums.arm.com

Hi, is the Cortex-M3 supposed the user to do mannual instructions to recovery from the memory management fault handler?

After enable the MPU feature on my Cortex-M3 processor and stepped into the illegal access instruction, the MMF exception would generated as expected. But after executing of the normal MMF exception handler, the program would go back to the illegal access instruction again! We have inspected the stack of entering the MMF exception, the PC pushed is exactly the illegal instruction, that would be the cause of the loop. So is this the definition of the Cortex-M3 familiy?

The other exceptions would normally adjust the PC value to the next instruction before entering the exception, liked system tick or other IRQs.

BR

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Joseph Yiu over 12 years ago

Note: This was originally posted on 8th June 2011 at http://forums.arm.com

Hi Sam,

The exception mechanism in Cortex-M processors is different from classic ARM processors (ARM7, ARM9, etc).
For the memory management fault in Cortex-M3 (or any ARMv7-M processors), it is always returning the to faulting instruction.

regards,
Joseph
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Joseph Yiu over 12 years ago

Note: This was originally posted on 8th June 2011 at http://forums.arm.com

Hi Sam,

The exception mechanism in Cortex-M processors is different from classic ARM processors (ARM7, ARM9, etc).
For the memory management fault in Cortex-M3 (or any ARMv7-M processors), it is always returning the to faulting instruction.

regards,
Joseph
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