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Reading 8 u8s into 8 u16 lanes in NEON Q register

Note: This was originally posted on 2nd June 2011 at http://forums.arm.com

I'm totally new to SIMD handcoding and the ARM ISA in general, and am having trouble understanding the documentation for the vector load instructions. I have an array of 8 unsigned 8-bit numbers on the heap, and I would like to load them into a q-register as 16 bit unsigned integers (0 extended), filling all 128 bits. The 16-bit width is needed because of multiplies that I perform after the load instruction.

I believe I have everything else figured out, but even after reading the docs for the VLDn instruction multiple times, I was unable to determine if this is possible with a single instruction. I do not care what order the u8s are loaded into the register, provided it's deterministic.

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Justin Wick over 12 years ago

Note: This was originally posted on 2nd June 2011 at http://forums.arm.com

Thanks, this solved my problem! The rest of the math was straightforward from there.
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Justin Wick over 12 years ago

Note: This was originally posted on 2nd June 2011 at http://forums.arm.com

Thanks, this solved my problem! The rest of the math was straightforward from there.
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