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ARM7TDMI - Exceptions

Note: This was originally posted on 2nd June 2011 at http://forums.arm.com

Hi All,
I have a doubt in ARM7TDMI exception,

Once exception (FIQ, IRQ, or Data Abort, Pre-fetch Abort) occured, then regardless of the previouse mode (ARM or THUMB) the lr value will be as follows
FIQ -> PC+4 , where PC is the next instruction to be executed after return frm exception
IRQ -> PC+4, where PC is the next instruction to be executed after return frm exception
Data Abrt -> PC+8, where PC is the instruction which got aborted
PreFetch -> PC + 4 , where where PC is the prefetched instruction.
Why this is same for both ARM and Thumb mode?
Can anyone explain?

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Peter Harris over 12 years ago

Note: This was originally posted on 2nd June 2011 at http://forums.arm.com

"Magic" =)

It makes writing exception handlers which don't care about the ARM/Thumb state of the interrupt code very easy.
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Peter Harris over 12 years ago

Note: This was originally posted on 2nd June 2011 at http://forums.arm.com

"Magic" =)

It makes writing exception handlers which don't care about the ARM/Thumb state of the interrupt code very easy.
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