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Alignment in Cortex-M3 and RVDS

Sagar Jadhav
Note: This was originally posted on 6th May 2011 at http://forums.arm.com

Hi all,

I am using RVDS 4.1 for debugging a Corex-M3 based target. I am facing an alignment issue. My code is making 2-byte as well as 4-byte aligned access. I want it to make only 4-byte aligned access.

1. Can anyone tell me how I can find out whether program is making or not a 4-byte aligned access(of instruction or data)?
2. Can i know whether a function (in disassembly) or a section in scatter loading file is 4-byte aligned or not??
3. Can you suggest anything i can make use of in my scatter loading file (I am using 'ALIGNALL 4' option for a few regions, but randomly)??

4. Also, which instruction set does Cortex-M3 use - ARM or THUMB or THUMB-2 or any combination of these 3?

Thanks,
Sagar.
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