This discussion has been locked.

You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Sample for CP15 C0

Note: This was originally posted on 30th March 2011 at http://forums.arm.com

I can't see how to use CP 15 various registers. Does anyone have a snippet that retrieves the implementer or perhaps the cache info from the CPU using CP15?

Jeff Kirkham over 12 years ago

Note: This was originally posted on 14th April 2011 at http://forums.arm.com

Actually I was looking for code that can give me the cache size, line size, associativity, type and level. This needs to run in user mode on Cortex A9. I get the impression from the docs that what I want is not available in user mode.
Cancel
Vote up 0 Vote down

Cancel
Martin Weidmann over 12 years ago

Note: This was originally posted on 5th April 2011 at http://forums.arm.com

The ARM ARM gives an example cache clean routine which uses the CP15 registers to work out how much cache there is to clean. Would that do?
Cancel
Vote up 0 Vote down

Cancel
Peter Harris over 12 years ago

Note: This was originally posted on 15th April 2011 at http://forums.arm.com

Correct - cache setup and maintenance operations are only available from privileged mode.

What are you actually trying to do in user space that needs this information? Cache line length is important to know if you are dealing with a hardware peripheral - but because a hardware device typically needs a privileged device driver, then adding a query to the driver to get the line length is the common method.
Cancel
Vote up 0 Vote down

Cancel