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Cortex-M3: Changing an ISR address is being reset

Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

Hi,

I have the following code and see some unexpected behavior. If someone could provide some help - my search so far has not led to anything useful.

Code:

printf("Addr %08x\n",*((unsigned int *)164));
*((unsigned int *)164) = 12;
asm volatile ("dmb");
printf("Addr2 %08x\n",*((unsigned int *)164));
printf("Addr3 %08x\n",*((unsigned int *)164));


I would typically expect to get the following printout (lets say the address is initially 0x0008080d):

Addr 0008080d
Addr2 0000000c
Addr3 0000000c


But I get:

Addr 0008080d
Addr2 0000000c
Addr3 0008080d


Now the printf causes some interrupts in the back but I would not expect this to change my ISR address of this peripheral (PWM).

Any thoughts why the address is being reset?

Many Thanks for any help on this.

EDIT:
If I pack the call "*((unsigned int *)164) = 12;" into a function I get the following result, which points that it might be related to something with the actual function call (may it be printf or whatever). But it just adds to my confusion right now.


Addr 0008080d
Addr2 0008080d
Addr3 0008080d
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  • Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

    I suspect that this has compiled to code approximating:


      r0 = "Addr1.."
      r1 = [164]
      BL printf  // r0 = "Addr1...", r1 = [164]
      r1 = 12;
      [164] = r1;
      dmb
      r0 = "Addr2..."
      BL printf  // r0 = "Addr2...", r1 = 12
      r0 = "Addr3..."
      r1 = [164]
      BL printf  // r0 = "Addr3...", r1 = [164]

    The value written to [164] is already available in the correct register for the "Addr2" printf call and is not marked volatile, so it is not read as the compiler assumes that the write is successful. If however, the memory at [164] is not directly writable, for instance it is ROM or Flash, then this assumption is false. The "Addr3" printf call cannot rely on the value of r1 still being correct (the earlier printf call is allowed to corrupt it), thus a re-read is necessary, and exposes that [164] is not writable.

    hth
    s.
Reply
  • Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

    I suspect that this has compiled to code approximating:


      r0 = "Addr1.."
      r1 = [164]
      BL printf  // r0 = "Addr1...", r1 = [164]
      r1 = 12;
      [164] = r1;
      dmb
      r0 = "Addr2..."
      BL printf  // r0 = "Addr2...", r1 = 12
      r0 = "Addr3..."
      r1 = [164]
      BL printf  // r0 = "Addr3...", r1 = [164]

    The value written to [164] is already available in the correct register for the "Addr2" printf call and is not marked volatile, so it is not read as the compiler assumes that the write is successful. If however, the memory at [164] is not directly writable, for instance it is ROM or Flash, then this assumption is false. The "Addr3" printf call cannot rely on the value of r1 still being correct (the earlier printf call is allowed to corrupt it), thus a re-read is necessary, and exposes that [164] is not writable.

    hth
    s.
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