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Non-Temporal Writes in SIMD Instruction set

Note: This was originally posted on 21st March 2011 at http://forums.arm.com

X-86 platform supports what they term as non-temporal writes. This just means stores from the registers to memory that do not influence the cache. They are purported to run faster. Are there similar instructions for the NEON where we can speed up a simple memory copy by writing directly to memory and bypassing the cache?

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Jeff Kirkham over 12 years ago

Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

Also, there is this article that I am told is irrelevant for the Cortex A9, but I have not been told why it is irrelevant. What has changed from the A-8 to the A-9 that renders the numbers in this article irrelevant?
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka13544.html
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Jeff Kirkham over 12 years ago

Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

Also, there is this article that I am told is irrelevant for the Cortex A9, but I have not been told why it is irrelevant. What has changed from the A-8 to the A-9 that renders the numbers in this article irrelevant?
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka13544.html
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