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Serial Wire Debug AP access

Yogatheesan Varatharajah
Note: This was originally posted on 15th March 2011 at http://forums.arm.com

Please somebody help me with this issue.
I am trying to program the flash memory using Serial wire Debug in a  STM32L152 advanced ARM-based 32-bit MCU.
I will be almost done if this issue gets cleared. I am able to do read and write  accesses on each of the  DP registers if they actually allow to do so.And when I try to read one of the AP registers, it gives me  an 'OK' response.  But when I read the value, it gives all zeroes. After  that I tried to read the Read Buffer register. Still the same answer.  Also when I try to write one of the AP registers, it gives an 'OK'  response. Then I sent some 32 bits with a parity bit to be written. But  after that the 'STICKYERR' bit got set in the CTRL/STATUS register  with the data not being written I hope,which means some bus error has  occurred. What may be the problem? At least I should be able to do read  and write accesses in the CSW-AP register. Am I right? I thing I may not  be aware of some important issue. I would be very much grateful to you  if you could spend a little time in clarifying my doubt.

What is the importance of the Clock signal in AP access? Will it be a reason for the above issue?


Parents
  • Note: This was originally posted on 18th March 2011 at http://forums.arm.com

    Hello! nobody there?
    Okay! May be that question doesn't explain the problem understandably.
    For example, the sequence was like this for the first case
    • Write AP SELECT register-(10001101,100,000011110000000000000000000000000)
    • Read IDR(AP) - 'OK' response,but no reading-(11111001,100,0000000000000000000000000000000000)
    • Read CTRL/STAT-(10110001,100,100000100000000000000000000000000)
            
    (The last bits are parity bits in all cases)

    And for the second case
    • Write AP SELECT Register-(10001101,100,000000000000000000000000000000000)
    • Write CSW(AP) -'OK' response-(11011101,100,1000101000000000000000000000000001)
    • Read CTRL/STAT -STKERR flag set-(10110001,100,100001100000000000000000000000000)
    And I have driven the clock signal continuously without driving the clock low  when accessing AP registers after writing the AP SELECT register.
Reply
  • Note: This was originally posted on 18th March 2011 at http://forums.arm.com

    Hello! nobody there?
    Okay! May be that question doesn't explain the problem understandably.
    For example, the sequence was like this for the first case
    • Write AP SELECT register-(10001101,100,000011110000000000000000000000000)
    • Read IDR(AP) - 'OK' response,but no reading-(11111001,100,0000000000000000000000000000000000)
    • Read CTRL/STAT-(10110001,100,100000100000000000000000000000000)
            
    (The last bits are parity bits in all cases)

    And for the second case
    • Write AP SELECT Register-(10001101,100,000000000000000000000000000000000)
    • Write CSW(AP) -'OK' response-(11011101,100,1000101000000000000000000000000001)
    • Read CTRL/STAT -STKERR flag set-(10110001,100,100001100000000000000000000000000)
    And I have driven the clock signal continuously without driving the clock low  when accessing AP registers after writing the AP SELECT register.
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