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Is there ANY Cortex core that supports reentrant interrupts?

Konstantin Dimitrov
Note: This was originally posted on 28th February 2011 at http://forums.arm.com

For some (external to me) reason I am stuck with the Cortex but trying to find work around to my software issues with the lack of reentrant interrupts in CM3. Does CM4 support reentrancy? Or maybe CM0? Anything at all?
Please help!


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  • Arm Employee Badge
    Note: This was originally posted on 28th February 2011 at http://forums.arm.com

    Hi Marcus,

    Cortex-R and Cortex-A processors does not have NVIC. Users (SoC designers) using these processors can use the Generic Interrupt Controller (GIC) or they could use their own interrupt controller. In terms of the processor itself, these processors don't have the priority level management as in Cortex-M processors so a programmer can create reentrant interrupt as in ARM7TDMI.

    regards,
    Joseph
Reply
  • Arm Employee Badge
    Note: This was originally posted on 28th February 2011 at http://forums.arm.com

    Hi Marcus,

    Cortex-R and Cortex-A processors does not have NVIC. Users (SoC designers) using these processors can use the Generic Interrupt Controller (GIC) or they could use their own interrupt controller. In terms of the processor itself, these processors don't have the priority level management as in Cortex-M processors so a programmer can create reentrant interrupt as in ARM7TDMI.

    regards,
    Joseph
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