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Is there ANY Cortex core that supports reentrant interrupts?
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Is there ANY Cortex core that supports reentrant interrupts?
Konstantin Dimitrov
over 12 years ago
Note: This was originally posted on 28th February 2011 at
http://forums.arm.com
For some (external to me) reason I am stuck with the Cortex but trying to find work around to my software issues with the lack of reentrant interrupts in CM3. Does CM4 support reentrancy? Or maybe CM0? Anything at all?
Please help!
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Konstantin Dimitrov
over 12 years ago
Note: This was originally posted on 15th March 2011 at
http://forums.arm.com
Thanks Joseph! I really appreciate your help. Would it be too much if I asked for some code example? As I mentioned above I don't know M3 at its low level neither have any intention whatsoever to develop skills in it (it's a brain sick concept to me), but I really have to pull that single project with it. It is this little part only that interacts with NVIC that causes me so much headache.
And unfortunately I NEED reentrancy in this particular case.
Please!
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Konstantin Dimitrov
over 12 years ago
Note: This was originally posted on 15th March 2011 at
http://forums.arm.com
Thanks Joseph! I really appreciate your help. Would it be too much if I asked for some code example? As I mentioned above I don't know M3 at its low level neither have any intention whatsoever to develop skills in it (it's a brain sick concept to me), but I really have to pull that single project with it. It is this little part only that interacts with NVIC that causes me so much headache.
And unfortunately I NEED reentrancy in this particular case.
Please!
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