• Locked Locked
  • Replies 8 replies
  • Subscribers 119 subscribers
  • Views 4738 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Slow performance on samsung S3C6410

Marcin Jędrzejewski
Note: This was originally posted on 18th January 2011 at http://forums.arm.com

Hi,

I'am a software developer and I am trying to port our product to new device. This is Windows CE 6 device with S3C6410 (ARM1176JZF-S) CPU.  The problem is that Q-Bench benchmarks show that this is very fast system but after executing our application it is actually very slow.

I have spend a lot of time profiling various parts of our product, but it shows nothing. Finally what I have found out is that the problem is with the huge code amount. Actually our .exe is ~10MB in size. I have made tests in which I have auto generated huge amounts of code (~200,000 lines of c++ code, VS2005 compiled), and now executing this exe (~1.5MB) on this device shows significant slow down, 8 - 10 times comparing it to other devices (with slower CPUs). This auto generated code does nothing with data, it just executes lots of functions which just increment some variables.

My question is what is the source of problem? From What I know this CPU has  16 KiB instruction cache. Can it be somehow badly configured? I actually have no contact with this device manufacturer. I can only give some hints to its reseler to maybe push information further.

some more info:
Q-Bench Pro - shows that Cache Line == 8, while on other devices it is 32
CeGetCacheInfo - gives below results:
dwL1Flags=0
dwL1ICacheSize=16384
dwL1ICacheLineSize=32
dwL1ICacheNumWays=4
dwL1DCacheSize=16384
dwL1DCacheLineSize=32
dwL1DCacheNumWays=4
dwL2Flags=0
dwL2ICacheSize=0
dwL2ICacheLineSize=0
dwL2ICacheNumWays=0
dwL2DCacheSize=0
dwL2DCacheLineSize=0
dwL2DCacheNumWays=0

Thank You for any help
Martin
Parents
  • Note: This was originally posted on 1st December 2011 at http://forums.arm.com

    TCM memory is much faster than main memory, such as SDRAM, it is kind of L2 cache. The instruction TCM definitively improve the CPU's performance. So, please enable it and run your program again.
    BTW, what the size of instruction TCM on this chip?
    Anyway,  a lot code optimization can be done to increase the instruction cache hit rate.

    HTH.
    B.R
    Jerry
Reply
  • Note: This was originally posted on 1st December 2011 at http://forums.arm.com

    TCM memory is much faster than main memory, such as SDRAM, it is kind of L2 cache. The instruction TCM definitively improve the CPU's performance. So, please enable it and run your program again.
    BTW, what the size of instruction TCM on this chip?
    Anyway,  a lot code optimization can be done to increase the instruction cache hit rate.

    HTH.
    B.R
    Jerry
Children
No data