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Cortex M3 - How detect stack overflow?

Andre Pereira
Note: This was originally posted on 12th January 2011 at http://forums.arm.com

Hi everybody,

I've started developing whit ARM few weeks a go and I have this doubt:
The Cortex-M3 have some hardware detection of stack overflow?

Let me explain:
I've used PIC24 for my last projects, and using as example, the PIC24 have the register "SPLIM" (Stack Pointer Limit) where you write the address of the last byte of your software stack and if your software try to write in more than the address wrote in the SPLIM register, the processor causes a "trap" (a kind of interruption with an dedicated vector).
Using this "trap" you can know if you have any stack overflow.

The ARM Cortex-M3 have something like that?

I've searched in the ARM v7 and the Cortex-M documentation and I just found something about BusFault in stacking but I don't understand very well.

Sorry for my poor english (I'm from Brazil) and thanks in advance.
André Rairan.
Parents
  • Arm Employee Badge
    Note: This was originally posted on 12th January 2011 at http://forums.arm.com

    In debug environment, you can use the data watchpoint feature to detect access to the last location in stack and trigger a halt of the core when it happen.

    Bus fault happen when the bus slave return an error response (e.g. access to invalid address location). In stack overflow detection, the stack push might still be in a valid location in SRAM, but exceed the expected stack size. In this case it won't trigger the bus fault. Therefore bus fault is not suitable for this.

    Note that in ARM processors, the stack pointer decrement in stack push, and increment in stack pop.
    regards,
    Joseph
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  • Arm Employee Badge
    Note: This was originally posted on 12th January 2011 at http://forums.arm.com

    In debug environment, you can use the data watchpoint feature to detect access to the last location in stack and trigger a halt of the core when it happen.

    Bus fault happen when the bus slave return an error response (e.g. access to invalid address location). In stack overflow detection, the stack push might still be in a valid location in SRAM, but exceed the expected stack size. In this case it won't trigger the bus fault. Therefore bus fault is not suitable for this.

    Note that in ARM processors, the stack pointer decrement in stack push, and increment in stack pop.
    regards,
    Joseph
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