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VPf vector example

Etienne SOBOLE
Note: This was originally posted on 5th January 2011 at http://forums.arm.com

Hi.

the cortex documentation speak about register bank for vector usage.
That's great, but I do not really understand what is a vector instruction (using those bank)

Does anybody can give me an example using the register bank and vpf vector instruction ?

Thank's
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  • Arm Employee Badge
    Note: This was originally posted on 5th January 2011 at http://forums.arm.com

    In archtecture v7-A processors that have the feature (for example Cortex-A5, -A8, -A9, -A15), you want to use the Advanced SIMD (also known as NEON) instructions, e.g. VLD1.16/VADD.I16/VST1.16.  They use a register bank where the registers are named D0-D31 (overlapped with Q0-Q15) that is separate from the integer registers R0-R14.

    You can find some examples in various thread in this forum, for example: http://forums.arm.co...th-arm-or-neon/.

    It's a bit confusing because the VFP instructions (which are older than NEON) use the same D0-D31* register bank and could originally do short vector operations.  But the short vectors were somewhat difficult to use and the feature was not used much, if at all.  In fact, the most recent implementations of the the VFP instructions no longer perform short vector operations in hardware.

    • in ARM11 processors with VFP there are only D0-D15.
Reply
  • Arm Employee Badge
    Note: This was originally posted on 5th January 2011 at http://forums.arm.com

    In archtecture v7-A processors that have the feature (for example Cortex-A5, -A8, -A9, -A15), you want to use the Advanced SIMD (also known as NEON) instructions, e.g. VLD1.16/VADD.I16/VST1.16.  They use a register bank where the registers are named D0-D31 (overlapped with Q0-Q15) that is separate from the integer registers R0-R14.

    You can find some examples in various thread in this forum, for example: http://forums.arm.co...th-arm-or-neon/.

    It's a bit confusing because the VFP instructions (which are older than NEON) use the same D0-D31* register bank and could originally do short vector operations.  But the short vectors were somewhat difficult to use and the feature was not used much, if at all.  In fact, the most recent implementations of the the VFP instructions no longer perform short vector operations in hardware.

    • in ARM11 processors with VFP there are only D0-D15.
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