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Output data via SWO without debugger ?

Martin Maurer
Note: This was originally posted on 15th November 2010 at http://forums.arm.com

Hello,

i am using a Cortex-M3 (in my case a TI Stellaris LM3S9B92 Rev B1).
I would like to know, if it is possible to output data via SWO without a debugger ?
Do i need any clocks (via SWD) from outside (normally generated by the debugger) to output data via SWO (UART, not Manchester) ?

I already tried the following from inside Cortex-M3:

In setup:

#define TRCENA       0x01000000

#define DEMCR     (*((volatile unsigned long *)(0xE000EDFC)))
#define TRACE_ENABLE_REGISTER     (*((volatile unsigned long *)(0xE0000E00)))
#define TRACE_CONTROL_REGISTER       (*((volatile unsigned long *)(0xE0000E80)))
#define ASYNC_CLOCK_PRESCALER_REGISTER  (*((volatile unsigned long *)(0xE0040010)))
#define SELECTED_PIN_CONTROL_REGISTER   (*((volatile unsigned long *)(0xE00400F0)))

             DEMCR = DEMCR | TRCENA;

             TRACE_ENABLE_REGISTER = 0xFFFFFFFF;

             TRACE_CONTROL_REGISTER = 0x00000001;

             ASYNC_CLOCK_PRESCALER_REGISTER = 10;

             SELECTED_PIN_CONTROL_REGISTER = 0x00000002;

In main loop:

   if (DEMCR & TRCENA)
   {
     while (ITM_Port32(0) == 0);
     ITM_Port8(0) = 0x41;
   }


But i don't see any activity on SWO, nor is the line switched to output at all...

Best regards,

Martin
Parents
  • Note: This was originally posted on 24th November 2010 at http://forums.arm.com

    Hi Joseph,


    From memory the Cortex-M3 has additional packets (for DWT) and the protocol details are documented in the ARMv7-M Architecture Referenence Manual.
    (ARM DDI 0403).  Please note that the ARMv7-M Application Level Architecture Referenence Manual (ARM DDI 0405) does not include this information.
    You'll need to register on ARM website to get this docment.


    many thanks for the hint to DDI 403. Jumping from one superseeded version to another, i think i know have used the right and latest one:
    DDI0403D_arm_architecture_v7m_reference_manual.pdf

    I am meanwhile able to generate and decode some of the fields, but i am still missing the overall structure.

    Example (same as above)
    01 03 xx xx xx xx 01 00 00 00 00 00 00 00 00 02

    I found out that the first byte contains an id (ATIDM[6:0] value), which i can program via TRACE_CONTROL_REGISTER.
    (http://infocenter.ar...h/Chdiicbc.html)
    03 seems to be SWIT, then four bytes, which i wrote to ITM_Port32.
    (http://infocenter.ar...H.html#Chdhdjaa)

    But then i am lost, what is the meaning of the second 01 ? Is it again an ATIDM ? Or SWIT ? Or something completely different ?
    And the multiple 00 and final 02 ?

    Can you help me here or perhaps point me to some additional documentation ?

    Best regards and many, many thanks,

        Martin
Reply
  • Note: This was originally posted on 24th November 2010 at http://forums.arm.com

    Hi Joseph,


    From memory the Cortex-M3 has additional packets (for DWT) and the protocol details are documented in the ARMv7-M Architecture Referenence Manual.
    (ARM DDI 0403).  Please note that the ARMv7-M Application Level Architecture Referenence Manual (ARM DDI 0405) does not include this information.
    You'll need to register on ARM website to get this docment.


    many thanks for the hint to DDI 403. Jumping from one superseeded version to another, i think i know have used the right and latest one:
    DDI0403D_arm_architecture_v7m_reference_manual.pdf

    I am meanwhile able to generate and decode some of the fields, but i am still missing the overall structure.

    Example (same as above)
    01 03 xx xx xx xx 01 00 00 00 00 00 00 00 00 02

    I found out that the first byte contains an id (ATIDM[6:0] value), which i can program via TRACE_CONTROL_REGISTER.
    (http://infocenter.ar...h/Chdiicbc.html)
    03 seems to be SWIT, then four bytes, which i wrote to ITM_Port32.
    (http://infocenter.ar...H.html#Chdhdjaa)

    But then i am lost, what is the meaning of the second 01 ? Is it again an ATIDM ? Or SWIT ? Or something completely different ?
    And the multiple 00 and final 02 ?

    Can you help me here or perhaps point me to some additional documentation ?

    Best regards and many, many thanks,

        Martin
Children
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