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Change the replacement stratege of cache

Note: This was originally posted on 6th August 2010 at http://forums.arm.com

Hi,all.
For the design of system, I want to change the repalcement stratege of cache from random replacement to predictable replacement. So I need to change the bit[14] in control register(c1) of cp15 from 0 to 1. But the property of this bit is secure modify only. Could tell me how could I modify it? The arm system  i used is arm11 with wince6.0.
Thanks.
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  • Note: This was originally posted on 18th August 2010 at http://forums.arm.com

    My ARM is ARM1176JFZ-S. So can you tell the system calls WINCE6.0 provide? Thanks.


    You could try changing it at boot-time in the bootstrap code, I doubt the OS code tries to set the cache replacement policy.

    Failing that you could try to implement some for of priviledged mode driver (something like a a character driver should do the trick), but letting user-space apps change settings like this is usually deemed a "bad idea", so perhaps it is something you could change in the board-support-package code which enables the cache in the first place.
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  • Note: This was originally posted on 18th August 2010 at http://forums.arm.com

    My ARM is ARM1176JFZ-S. So can you tell the system calls WINCE6.0 provide? Thanks.


    You could try changing it at boot-time in the bootstrap code, I doubt the OS code tries to set the cache replacement policy.

    Failing that you could try to implement some for of priviledged mode driver (something like a a character driver should do the trick), but letting user-space apps change settings like this is usually deemed a "bad idea", so perhaps it is something you could change in the board-support-package code which enables the cache in the first place.
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