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Routine calls in Arm

Japan Dave
Note: This was originally posted on 19th July 2010 at http://forums.arm.com

I have a quetion about mechanism used while making nested routine calls in ARM based products.

Say suppose at an instant my core is executing the routine A and routine B is invoked by encountering the instruction.

As it tells, the address of the immidiate instruction of routine A from where the execution turned its stream towards B is stoed on list register. Uptill this it is clear like crystal.

But what if now while routine B is executing any interrupt occurs or any call is made to say routine C . . .
Now we need to store the address of the next instruction of the B routine . .
If we store it onto the list register then how can we preserve its previous value which points to immediate instruction of routine A.

Pls eloberate on this.


Thanks in advance,
Parents
  • Arm Employee Badge
    Note: This was originally posted on 21st July 2010 at http://forums.arm.com

    For exception handling, the hardware automatically pushes the link-register, along with over relevant state, onto the stack before it starts executing the interrupt handler code.


    The hardware only does this automatically for the Cortex-M processors.  Other ARM processors have a more complex exception model that involves having different "mode"s each with different stack pointer (r13) and taking an exception causes a mode change.  [This is a somewhat oversimplified description.]  You can find the details in the ARMARM (ARM Architecture Reference Manual) at infocenter.arm.com.]
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  • Arm Employee Badge
    Note: This was originally posted on 21st July 2010 at http://forums.arm.com

    For exception handling, the hardware automatically pushes the link-register, along with over relevant state, onto the stack before it starts executing the interrupt handler code.


    The hardware only does this automatically for the Cortex-M processors.  Other ARM processors have a more complex exception model that involves having different "mode"s each with different stack pointer (r13) and taking an exception causes a mode change.  [This is a somewhat oversimplified description.]  You can find the details in the ARMARM (ARM Architecture Reference Manual) at infocenter.arm.com.]
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