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Temporarily block SYSTICK interrupt (but not lose it)

David Clark
Note: This was originally posted on 18th May 2010 at http://forums.arm.com

CM3 core... I'd like to temporarily block the SYSTICK interrupt (and *only* the SYSTICK interrupt) from firing.

The desired behavior is that if the SYSTICK interrupt would have fired, I'd like it to be "pended", so that as soon as the critical section is over and the interrupt is "re-enabled", it fires.

At first I thought this might be the TICKINT bit in the SYSTICK Control & Status Register (0xE000E010), but from the documentation, it seems that if this bit is clear and the timer reaches 0, the interrupt won't even be pended, i.e., it would be "lost".  Am I correct in this?

I know about PRIMASK & BASEPRI, but I don't want to isolate by level and I don't want to disable all interrupts... I simply want to prevent  the SYSTICK ISR  from running in between "point A" and "point B", but I don't want to "lose" the interrupt, I'd just like to "pend it" if it would occur between "point A" and "point B".

Thanks.
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  • Note: This was originally posted on 20th May 2010 at http://forums.arm.com

    There aren't many (if any) reasons I can see why you would want to do this. Most things typically requiring critical regions on other processors can be handled via exclusive accesses or the PendSV handler on Cortex-M3. What was the reason for your critical region?

    s.


    Fair question.  Shared data between tick interrupt and application... that's why I don't care if other interrupts fire in the mean time, they're oblivious to the resource contention.

    PendSV is being used by scheduler so I didn't want to mess with that.

    Since the data is shared between an interrupt & the application, I didn't want to use STREX / LDREX.

    Please let me know if my logic is flawed, I'm always open to a better solution!
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  • Note: This was originally posted on 20th May 2010 at http://forums.arm.com

    There aren't many (if any) reasons I can see why you would want to do this. Most things typically requiring critical regions on other processors can be handled via exclusive accesses or the PendSV handler on Cortex-M3. What was the reason for your critical region?

    s.


    Fair question.  Shared data between tick interrupt and application... that's why I don't care if other interrupts fire in the mean time, they're oblivious to the resource contention.

    PendSV is being used by scheduler so I didn't want to mess with that.

    Since the data is shared between an interrupt & the application, I didn't want to use STREX / LDREX.

    Please let me know if my logic is flawed, I'm always open to a better solution!
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