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CortexA8 Booting Problem

Noorulla Mohammad
Note: This was originally posted on 26th April 2010 at http://forums.arm.com

Hi,

I'm working on cortexA8 bootup. when i enabled the Cache in CP15 Control Register, the processor hangs. when i see the eis log it struck after this instruction.

Can you please tell me what could be went wrong. How to make sure that my CortexA8 processor generated properly.

Thanks,
Noorulla
Parents
  • Note: This was originally posted on 28th April 2010 at http://forums.arm.com

    Have you invalidated the cache before enabling it? The contents of the cache are undefined at power-on, and must be invalidated before they are enabled, otherwise you risk picking up random data as code / data.

    Other possible thoughts - are you just enabling the cache, or are you also enabling the MMU in the same operation? If you are enabling the MMU then there is a chance that the translation tables are not correctly configured and you are getting stuck in  fault loop because you do not hav permissions to access the page which you are executing.


    Hi ,

    I'm using the boot code provided by ARM  @ cortexA8 installation logical/tiger/vectors/src/power_indicative/dhrystone. And i build the CortexA8 with hlm_configuration script and i havn't replaced the memories.

    even with this i can see the CortexA8 hangs when it encountered the instruction where it enables the MMU and Cache.

    Thanks,
    Noorulla
Reply
  • Note: This was originally posted on 28th April 2010 at http://forums.arm.com

    Have you invalidated the cache before enabling it? The contents of the cache are undefined at power-on, and must be invalidated before they are enabled, otherwise you risk picking up random data as code / data.

    Other possible thoughts - are you just enabling the cache, or are you also enabling the MMU in the same operation? If you are enabling the MMU then there is a chance that the translation tables are not correctly configured and you are getting stuck in  fault loop because you do not hav permissions to access the page which you are executing.


    Hi ,

    I'm using the boot code provided by ARM  @ cortexA8 installation logical/tiger/vectors/src/power_indicative/dhrystone. And i build the CortexA8 with hlm_configuration script and i havn't replaced the memories.

    even with this i can see the CortexA8 hangs when it encountered the instruction where it enables the MMU and Cache.

    Thanks,
    Noorulla
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