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Cortex M3 ITM trace

Miro Kostadinov
Note: This was originally posted on 18th March 2010 at http://forums.arm.com

Do I miss something or there is no way to implement interrupt driven debug trace on Cortex M3?

I know that the SWO interface is relatively fast, but still I would prefer to avoid any polling and blocking...
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  • Arm Employee Badge
    Note: This was originally posted on 18th March 2010 at http://forums.arm.com

    I'm afraid there is no interrupt support for ITM stimulus registers.
    Instead of using ITM you might need to use a UART for interrupt driven text output.
    The debug monitor exception only linked to breakpoint and watchpoint events and does not get trigger by the ITM buffer status.
    regards,
    Joseph
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  • Arm Employee Badge
    Note: This was originally posted on 18th March 2010 at http://forums.arm.com

    I'm afraid there is no interrupt support for ITM stimulus registers.
    Instead of using ITM you might need to use a UART for interrupt driven text output.
    The debug monitor exception only linked to breakpoint and watchpoint events and does not get trigger by the ITM buffer status.
    regards,
    Joseph
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