Arm Community
Site
Search
User
Site
Search
User
Groups
Research Collaboration and Enablement
DesignStart
Education Hub
Innovation
Open Source Software and Platforms
Forums
AI and ML forum
Architectures and Processors forum
Arm Development Platforms forum
Arm Development Studio forum
Arm Virtual Hardware forum
Automotive forum
Compilers and Libraries forum
Graphics, Gaming, and VR forum
High Performance Computing (HPC) forum
Infrastructure Solutions forum
Internet of Things (IoT) forum
Keil forum
Morello Forum
Operating Systems forum
SoC Design and Simulation forum
中文社区论区
Blogs
AI and ML blog
Announcements
Architectures and Processors blog
Automotive blog
Graphics, Gaming, and VR blog
High Performance Computing (HPC) blog
Infrastructure Solutions blog
Innovation blog
Internet of Things (IoT) blog
Operating Systems blog
Research Articles
SoC Design and Simulation blog
Tools, Software and IDEs blog
中文社区博客
Support
Arm Support Services
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Support forums
Arm Development Studio forum
Data abort
Jump...
Cancel
Locked
Locked
Replies
3 replies
Subscribers
121 subscribers
Views
2732 views
Users
0 members are here
Options
Share
More actions
Cancel
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion
Data abort
Offline
mcarthy mcarthy
over 9 years ago
Note: This was originally posted on 30th January 2010 at
http://forums.arm.com
Hi ,
I am working on arm from past few momths.I have one question that in ARM why unalligned address operation will give data abort ?and is this thing will be happened for any special case ?Pleae help me to know actually when and why it will be happened. I came across thorugh some sites but still not get a clear picture.
Second thing if a value is not found then MMU misses the caches but how will i know the misses happened.?
I am looking forward to you .
Thanks
Mac
Parents
Offline
Simon Craske
over 9 years ago
Note: This was originally posted on 30th January 2010 at
http://forums.arm.com
Since ARMv6 (ARM11) unaligned transactions are support if the CPU is configured correctly, at least for non-multiple load/stores.
Unaligned transactions are naturally hard for the hardware, as they potentially require a single word/half-word load/store being converted into multiple bus transactions
Second thing if a value is not found then MMU misses the caches but how will i know the misses
I'm not sure what the question here is.
hth
s.
Cancel
Up
0
Down
Cancel
Reply
Offline
Simon Craske
over 9 years ago
Note: This was originally posted on 30th January 2010 at
http://forums.arm.com
Since ARMv6 (ARM11) unaligned transactions are support if the CPU is configured correctly, at least for non-multiple load/stores.
Unaligned transactions are naturally hard for the hardware, as they potentially require a single word/half-word load/store being converted into multiple bus transactions
Second thing if a value is not found then MMU misses the caches but how will i know the misses
I'm not sure what the question here is.
hth
s.
Cancel
Up
0
Down
Cancel
Children
No data