• Locked Locked
  • Replies 3 replies
  • Subscribers 119 subscribers
  • Views 3170 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Data abort

mcarthy mcarthy
Note: This was originally posted on 30th January 2010 at http://forums.arm.com

Hi ,
  I am working on arm from past few momths.I have one question that in ARM why unalligned address operation will give data abort ?and  is this thing will be happened for any special case ?Pleae help me to know actually when and why it will be happened. I came across thorugh some sites but still not get a clear picture.

Second thing if a value is not found then MMU misses the caches but how will i know the misses happened.?


I am looking forward to you .

Thanks
Mac
Parents
  • Note: This was originally posted on 1st February 2010 at http://forums.arm.com

    Hi,
    It is not always that core generate abort for unaligned access. You can configure core either generate abort or not. In some cases accesses to unaligned addresses gives random result (unpredictable). Please refer architecture reference manual for this information.

    regards,
    Jameer 




    hi,

    Thanks for the reply .Can you please say little bit more on this that  why unalligned adress operation will give us data abort .? Is it always to do the same ?
    The second question is :-When an instruction requests data from a cache, if the data is not there, a cache "˜miss' results,so will i know that "miss" happen..... means how to check that ?

    Thanks

    Macy
Reply
  • Note: This was originally posted on 1st February 2010 at http://forums.arm.com

    Hi,
    It is not always that core generate abort for unaligned access. You can configure core either generate abort or not. In some cases accesses to unaligned addresses gives random result (unpredictable). Please refer architecture reference manual for this information.

    regards,
    Jameer 




    hi,

    Thanks for the reply .Can you please say little bit more on this that  why unalligned adress operation will give us data abort .? Is it always to do the same ?
    The second question is :-When an instruction requests data from a cache, if the data is not there, a cache "˜miss' results,so will i know that "miss" happen..... means how to check that ?

    Thanks

    Macy
Children
No data