This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Debugging Cortex M3 from external Flash

Note: This was originally posted on 12th January 2010 at http://forums.arm.com

Hello,

I am using the STM32F103 controller from ST having the cortex M3 core. My firmware mechanism demands some portion of code to be executed from external Flash memory.

While executing the firmware from external memory I could not put the hard breakpoints.

1. Is this a limitation of Cortex - M3 core or the controller?  
2. Can this be overcome by using any other tool then J-Link?
3. If this is a limitation of core the please let me know if you have any suggestions or workarounds.

Thanks,
Prasad
Parents
  • Note: This was originally posted on 13th January 2010 at http://forums.arm.com

    Hello,

    Thanks for the suggestions.

    Out of the suggested options first ('If possible, relocate your external flash to below 0x20000000') is not possible because code won't fit in available internal flash area.

    Second option 'replace the flash device with a RAM device during debug' : How this will help to place the break points as RAM will still be mapped out of '0x0 - 0x1FFFFFFF' area? External flash uses the FSMC bank1 area (0x6400 0000 - 0x67FF FFFF).

    Third option 'alternatively, use a PC based watchpoint match to halt' : How can use the PC based watchpoints? Any reference link to understand this concept?

    Currently I am using 'asm ("BKPT xxx");'  instruction to place a break point at respective point but it is very much time consuming.

    Regards,
    Prasad
Reply
  • Note: This was originally posted on 13th January 2010 at http://forums.arm.com

    Hello,

    Thanks for the suggestions.

    Out of the suggested options first ('If possible, relocate your external flash to below 0x20000000') is not possible because code won't fit in available internal flash area.

    Second option 'replace the flash device with a RAM device during debug' : How this will help to place the break points as RAM will still be mapped out of '0x0 - 0x1FFFFFFF' area? External flash uses the FSMC bank1 area (0x6400 0000 - 0x67FF FFFF).

    Third option 'alternatively, use a PC based watchpoint match to halt' : How can use the PC based watchpoints? Any reference link to understand this concept?

    Currently I am using 'asm ("BKPT xxx");'  instruction to place a break point at respective point but it is very much time consuming.

    Regards,
    Prasad
Children
No data