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"Instruction Not Supported" error for SMLSD on ARM968E-S?

Note: This was originally posted on 19th October 2009 at http://forums.arm.com

Hi, I'm running into a problem (or to be exact, a collaborator of mine is seeing this problem)
with ARM assembler. It reports SMLSD instruction as not supported on the ARM968E-S
(a processor that according to the documentation *does* support this instruction. The
exact error message is:

../lib/neurofunc/subTimerInt.s(138) : error A1356:  Instruction not supported on targeted CPU

and the critical lines  are:

          SMULBT  r6, r6, r6                                ;r6 = Rmem/t
          SMULWB  r6, r6, r1                                ;Rmem/t*I
          SMLSD   r4, r5, r4, r6                            ;r4 = 1/t*(Vrest-v+IRmem)
         
          ;;if (v > THRESHOLD)?
          CMP      r4, r7, LSR #FixedP2           
          BGE      fired

for which the offending line is (obviously) the one containing the SMLSD.

The assembler invocation looks like:

armasm --diag_style=ide --depend="lib/neurofunc/subTimerInt.d" -g --keep --cpu=ARM968E-S -o"lib/neurofunc/subTimerInt.o" "../lib/neurofunc/subTimerInt.s" && \

and it's worth noting that the assembler is also reporting instruction not supported for the
ARM1136JF-S and  ARM1176JZF-S.

Any ideas why this is failing?

Thanks for any help.
Parents
  • Note: This was originally posted on 20th October 2009 at http://forums.arm.com

    Which docs are you looking at?  Looking at my copy of the v7-A/R ARM ARM (DDI 0406B) it only lists a v6 (v6 for ARM, v6T2 for Thumb) and v7 encoding for the SMLSD (section A8.6.172).  The instruction doesn't appear in my old printed copy of the v5TE ARM ARM.
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  • Note: This was originally posted on 20th October 2009 at http://forums.arm.com

    Which docs are you looking at?  Looking at my copy of the v7-A/R ARM ARM (DDI 0406B) it only lists a v6 (v6 for ARM, v6T2 for Thumb) and v7 encoding for the SMLSD (section A8.6.172).  The instruction doesn't appear in my old printed copy of the v5TE ARM ARM.
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