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arm assembly - generating of 32 bit constants

Chmielewski Andreas
Note: This was originally posted on 13th October 2009 at http://forums.arm.com

Hi,

i am searching for an algorithm to load any kind of 32 bit constants. As you know the arm compiler puts in the most cases the constants with some add/mul etc instructions together instead of loading the constant via the program counter out of the "constant pool". The way the compiler generates the constants is not really known to me. Unfortunately I could not find anything about it right now. Does somebody know where i can find something explaining whats the best way is to generate constants. Thx
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  • Arm Employee Badge
    Note: This was originally posted on 13th October 2009 at http://forums.arm.com

    > As i need a generator for all various kind of constants there must be some good algorithm for this

    There isn't really an algorithm - the rule is pretty simple:

    For most ARM instructions the rule is "any 8-bit constant rotated an even number of places" - you simply encode an 8-bit constant and a separate rotation field which is doubled by the hardware. So encoding 0xFF and 0xF000000F would be OK, but 0xE000001F would not (8-bit constant, but requires an odd shift).

    The MVN (move not) instruction lets you invert any of these constants, so you could load 0x0FFFFFF0 using a single instruction in the instruction stream - although requires an explict MVN rahter than embedded the constant in a useful data processing instruction like AND / ORR / etc.

    If you can't encode your constant using these two methods then you are probably down to PC-relative loads from memory, or building a constant incrementally using smaller constants embedded in a sequence of ORR instructions
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  • Arm Employee Badge
    Note: This was originally posted on 13th October 2009 at http://forums.arm.com

    > As i need a generator for all various kind of constants there must be some good algorithm for this

    There isn't really an algorithm - the rule is pretty simple:

    For most ARM instructions the rule is "any 8-bit constant rotated an even number of places" - you simply encode an 8-bit constant and a separate rotation field which is doubled by the hardware. So encoding 0xFF and 0xF000000F would be OK, but 0xE000001F would not (8-bit constant, but requires an odd shift).

    The MVN (move not) instruction lets you invert any of these constants, so you could load 0x0FFFFFF0 using a single instruction in the instruction stream - although requires an explict MVN rahter than embedded the constant in a useful data processing instruction like AND / ORR / etc.

    If you can't encode your constant using these two methods then you are probably down to PC-relative loads from memory, or building a constant incrementally using smaller constants embedded in a sequence of ORR instructions
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