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ARM11 AXI bus behaviour

Note: This was originally posted on 21st August 2009 at http://forums.arm.com

Dear All:

I'm an engineer working on memory controller which is supposed to be connect to ARM11 through AXI bus.
In the AXI protocol, it defined a burst type named "Fixed Burst". This burst type is mainly favour FIFO access
for those peripherals. For system memory access, such burst type is very in-efficient.
So when I design the AXI interface, I prefer to not support "Fixed Burst" to simplize design and save gate count.
Can anyone tell me that if ARM11 will issue "Fixed Burst" to system memory location or not???

Thanks

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Simon Craske over 12 years ago

Note: This was originally posted on 21st August 2009 at http://forums.arm.com

Only from its DMA master port; see section "A.5 AXI Interface" (page 789) of the ARM1176 TRM at [url="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0333g/DDI0333G_arm1176jzs_r0p7_trm.pdf"]http://infocenter.arm.com/help/topic/com.a...zs_r0p7_trm.pdf[/url]

hth
s.
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Simon Craske over 12 years ago

Note: This was originally posted on 21st August 2009 at http://forums.arm.com

Only from its DMA master port; see section "A.5 AXI Interface" (page 789) of the ARM1176 TRM at [url="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0333g/DDI0333G_arm1176jzs_r0p7_trm.pdf"]http://infocenter.arm.com/help/topic/com.a...zs_r0p7_trm.pdf[/url]

hth
s.
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