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Disabling D-Cache

Note: This was originally posted on 3rd August 2009 at http://forums.arm.com

I use the following instructions

void disable_cache()
{
  asm(" MRC P15, #0, R0, C1, C0, #0 ");
  asm(" MOV R2, #4                  ");
  asm(" BIC R0, R0, R2              ");
  asm(" MCR P15, #0, R0, C1, C0, #0 ");
}

On reading the value of the cp15 register again using

asm(" MRC P15, #0, R0, C1, C0, #0 ");

R0 & 4 returns true indicating D-cache is still enabled.

Are the cp15 registers locked or protected? If yes then what should be done  to disable D-cache