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Program Counter update

Note: This was originally posted on 15th June 2009 at http://forums.arm.com

In the Architectural Reference Manual for ARMv7 the PC update is described such that it gets update with adding 8 to the current PC while executing an ARM instruction and adding 4 for Thumb instruction. ARM instructions are 32-bit, hence I'd expect the PC to be updated by adding 4 to it rather than 8. Does anyone knows what is the reason behind this? Am I missing something or is it a mistake?

Thanks
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  • Note: This was originally posted on 16th June 2009 at http://forums.arm.com

    PC, the Program Counter
    Register R15 is the program counter:
    "¢ When executing an ARM instruction, PC reads as the address of the current
    instruction plus 8.
    "¢ When executing a Thumb instruction, PC reads as the address of the current
    instruction plus 4.
    "¢ Writing an address to PC causes a branch to that address.
    In Thumb code, most instructions cannot access PC.


    This is the value that is returned when the PC is read.  I believe it's largely due to legacy.  When earlier implementations actually executed instructions, the core had already fetched two instructions after it, so the value in PC had already advanced by two instructions worth.
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  • Note: This was originally posted on 16th June 2009 at http://forums.arm.com

    PC, the Program Counter
    Register R15 is the program counter:
    "¢ When executing an ARM instruction, PC reads as the address of the current
    instruction plus 8.
    "¢ When executing a Thumb instruction, PC reads as the address of the current
    instruction plus 4.
    "¢ Writing an address to PC causes a branch to that address.
    In Thumb code, most instructions cannot access PC.


    This is the value that is returned when the PC is read.  I believe it's largely due to legacy.  When earlier implementations actually executed instructions, the core had already fetched two instructions after it, so the value in PC had already advanced by two instructions worth.
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