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Program Counter update

Maya Maya
Note: This was originally posted on 15th June 2009 at http://forums.arm.com

In the Architectural Reference Manual for ARMv7 the PC update is described such that it gets update with adding 8 to the current PC while executing an ARM instruction and adding 4 for Thumb instruction. ARM instructions are 32-bit, hence I'd expect the PC to be updated by adding 4 to it rather than 8. Does anyone knows what is the reason behind this? Am I missing something or is it a mistake?

Thanks
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  • Arm Employee Badge
    Note: This was originally posted on 16th June 2009 at http://forums.arm.com

    Ah - welcome to the wonders of a pipelined processor microarchitecture.

    The PC of the instruction being fetched *now* is generally ahead of the PC of the executing instruction *now*, and for historical reasons on the early ARM processors this pipelining effect resulted in the precise offsets you see. If you used PC during an instruction you would will see the "address of the executing instruction +8" - because PC had been incremented twice and the processor was now loading an instruction two ahead of the one being executed.

    The modern microarchitectures are a lot more complex than the early ARM processors, so the value of PC + 8 for ARM and PC+ 4 for Thumb does not really reflect any feature of the microarchitecture any more, but you have to specify something so software can function in the same ways on all of the different processors and using the existing standard makes most sense (the old software still works).
Reply
  • Arm Employee Badge
    Note: This was originally posted on 16th June 2009 at http://forums.arm.com

    Ah - welcome to the wonders of a pipelined processor microarchitecture.

    The PC of the instruction being fetched *now* is generally ahead of the PC of the executing instruction *now*, and for historical reasons on the early ARM processors this pipelining effect resulted in the precise offsets you see. If you used PC during an instruction you would will see the "address of the executing instruction +8" - because PC had been incremented twice and the processor was now loading an instruction two ahead of the one being executed.

    The modern microarchitectures are a lot more complex than the early ARM processors, so the value of PC + 8 for ARM and PC+ 4 for Thumb does not really reflect any feature of the microarchitecture any more, but you have to specify something so software can function in the same ways on all of the different processors and using the existing standard makes most sense (the old software still works).
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