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ARM1176 boot code issue

Note: This was originally posted on 5th June 2009 at http://forums.arm.com

Hi
I got an issue while writing the ARM1176 bootcode.

I used DCI 0xE1600071 instruction to switch from secure priviliged mode to monitor mode.
After ARM executed this instruction , tarmac.log file is not updated i.e., ARM is not switching to monitor mode but r14_mon and spsr_mon is updated

please let me know what could be the issue


Thanks,
Sathish
  • Note: This was originally posted on 5th June 2009 at http://forums.arm.com

    hi isogen
    yeah i programmed  monitor vector base address to 0x20
    so when arm executes SMI instruction, it has to jump to 0x28(base address + exception handler)
    but it is not happening .
    even arm in not in infinite loop as u said..
    in my case ARM is not executing any instruction after this..

    one more question.. why we need to program the stack of the monitor mode before executing SMI??

    --
    Sathish
  • Note: This was originally posted on 5th June 2009 at http://forums.arm.com

    Have you programmed up the monitor mode vector table, stack register, etc before executing the SMC?

    If you haven't reprogrammed the monitor vector base address then you may just be jumping to faulting memory - which causes the core to fault and jump to the monitor mode vector address - i.e. infinite loop.

    The Secure World can modify CPSR directly to switch in to monitor mode to perform this initial setup.
  • Note: This was originally posted on 9th June 2009 at http://forums.arm.com

    > one more question.. why we need to program the stack of the monitor mode before executing SMI??

    Just like most of the other exception modes in ARM, monitor has a local stack pointer stored in r13_mon. If you monitor code does anything with r13 then you need to make sure that it is initialized to a sensible location before using it. You could structure the SMI handler to initialize it to something sensible - so this will depend on how you have structured your monitor-mode code.

    When you say "in my case ARM is not executing any instruction after this" what behavior are you seeing in the core - it shouldn't just "not work", I would expect to be seeing an exception of some kind occurring.