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Cortexa8/9 FPU Data alignment
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Cortexa8/9 FPU Data alignment
JOG JOG
over 12 years ago
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JOG JOG
over 12 years ago
Note: This was originally posted on 5th June 2009 at
http://forums.arm.com
Hi Sim,
I am working on a simulator.
I also can try this simple software on RTL simulation.
The fromelf -c give the following results :
fpu_test_TestFunction
0x8001045c: b530 0. PUSH {r4,r5,lr}
0x8001045e: ed2d8b02 -... VPUSH {d8}
0x80010462: b087 .. SUB sp,sp,#0x1c
0x80010464: 4872 rH LDR r0,[pc,#456] ; [0x80010630] = 0x802063bc
0x80010466: a16f o. ADR r1,{pc}+0x1be ; 0x80010624
0x80010468: f006ffc8 .... BL __2fprintf ; 0x800173fc
0x8001046c: 4870 pH LDR r0,[pc,#448] ; [0x80010630] = 0x802063bc
0x8001046e: a171 q. ADR r1,{pc}+0x1c6 ; 0x80010634
0x80010470: f006ffc4 .... BL __2fprintf ; 0x800173fc
0x80010474: 486e nH LDR r0,[pc,#440] ; [0x80010630] = 0x802063bc
0x80010476: a16f o. ADR r1,{pc}+0x1be ; 0x80010634
0x80010478: f006ffc0 .... BL __2fprintf ; 0x800173fc
0x8001047c: ed9f0a6e ..n. VLDR s0,[pc,#440] ; [0x80010638] = 0
0x80010480: 4c6e nL LDR r4,[pc,#440] ; [0x8001063c] = 0x80200000
0x80010482: ed8d0a05 .... VSTR s0,[sp,#0x14]
0x80010486: f89d0014 .... LDRB r0,[sp,#0x14]
0x8001048a: 7020 p STRB r0,[r4,#0]
0x8001048c: f89d0015 .... LDRB r0,[sp,#0x15]
0x80010490: 7060 `p STRB r0,[r4,#1]
0x80010492: f89d0016 .... LDRB r0,[sp,#0x16]
0x80010496: 70a0 .p STRB r0,[r4,#2]
0x80010498: f89d0017 .... LDRB r0,[sp,#0x17]
0x8001049c: 70e0 .p STRB r0,[r4,#3]
0x8001049e: 4622 "F MOV r2,r4
0x800104a0: 4863 cH LDR r0,[pc,#396] ; [0x80010630] = 0x802063bc
0x800104a2: a167 g. ADR r1,{pc}+0x19e ; 0x80010640
0x800104a4: f006ffaa .... BL __2fprintf ; 0x800173fc
0x800104a8: 2500 .% MOVS r5,#0
0x800104aa: ed9f8b6a ..j. VLDR d8,[pc,#424] ; [0x80010654] = 0x9999999a
I have a data abort at this latest line (Have recomnpiled the test).
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JOG JOG
over 12 years ago
Note: This was originally posted on 5th June 2009 at
http://forums.arm.com
Hi Sim,
I am working on a simulator.
I also can try this simple software on RTL simulation.
The fromelf -c give the following results :
fpu_test_TestFunction
0x8001045c: b530 0. PUSH {r4,r5,lr}
0x8001045e: ed2d8b02 -... VPUSH {d8}
0x80010462: b087 .. SUB sp,sp,#0x1c
0x80010464: 4872 rH LDR r0,[pc,#456] ; [0x80010630] = 0x802063bc
0x80010466: a16f o. ADR r1,{pc}+0x1be ; 0x80010624
0x80010468: f006ffc8 .... BL __2fprintf ; 0x800173fc
0x8001046c: 4870 pH LDR r0,[pc,#448] ; [0x80010630] = 0x802063bc
0x8001046e: a171 q. ADR r1,{pc}+0x1c6 ; 0x80010634
0x80010470: f006ffc4 .... BL __2fprintf ; 0x800173fc
0x80010474: 486e nH LDR r0,[pc,#440] ; [0x80010630] = 0x802063bc
0x80010476: a16f o. ADR r1,{pc}+0x1be ; 0x80010634
0x80010478: f006ffc0 .... BL __2fprintf ; 0x800173fc
0x8001047c: ed9f0a6e ..n. VLDR s0,[pc,#440] ; [0x80010638] = 0
0x80010480: 4c6e nL LDR r4,[pc,#440] ; [0x8001063c] = 0x80200000
0x80010482: ed8d0a05 .... VSTR s0,[sp,#0x14]
0x80010486: f89d0014 .... LDRB r0,[sp,#0x14]
0x8001048a: 7020 p STRB r0,[r4,#0]
0x8001048c: f89d0015 .... LDRB r0,[sp,#0x15]
0x80010490: 7060 `p STRB r0,[r4,#1]
0x80010492: f89d0016 .... LDRB r0,[sp,#0x16]
0x80010496: 70a0 .p STRB r0,[r4,#2]
0x80010498: f89d0017 .... LDRB r0,[sp,#0x17]
0x8001049c: 70e0 .p STRB r0,[r4,#3]
0x8001049e: 4622 "F MOV r2,r4
0x800104a0: 4863 cH LDR r0,[pc,#396] ; [0x80010630] = 0x802063bc
0x800104a2: a167 g. ADR r1,{pc}+0x19e ; 0x80010640
0x800104a4: f006ffaa .... BL __2fprintf ; 0x800173fc
0x800104a8: 2500 .% MOVS r5,#0
0x800104aa: ed9f8b6a ..j. VLDR d8,[pc,#424] ; [0x80010654] = 0x9999999a
I have a data abort at this latest line (Have recomnpiled the test).
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