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# test pendSV handler.equ STACK_TOP, 0x20000800.text.global _start.code 16.syntax unified_start: .word STACK_TOP, start .type start, function @ let lsb to 1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word svc_isr+1 @ svc isr .word int_isr+1 .word int_isr+1 .word pendsv_handle+1 .word int_isr+1 .word int_isr+1 .word int_isr+1 .word int_isr+1start:@ ref: @ Cortex™-M3 Technical Reference Manual (file name: DDI0337E_cortex_m3_r1p1_trm.pdf)@ System Handler Priority Registers (p8-27) @ pendsv priority ldr r0, =0xe000ed22 mov r1, #0xff strb r1, [r0] @ systick priority ldr r0, =0xe000ed23 mov r1, #0xff strb r1, [r0] @ svc priority ldr r0, =0xe000ed1f mov r1, #0xff strb r1, [r0] cpsie i svc 0@ watch 0xe000ed24, 0xe000ed04 ref: arm cortex-m3: 嵌入式系統設計入門 p8-9 push {r0}deadloop: nop push {r0} b deadlooppendsv_handle: movs r2, #0x12 nop bx lrsvc_isr: @ enable pendsv ref: STM32F207 高性能网络型 MCU 嵌入式系统设计 p 412 ldr r0, =0xe000ed04 ldr r1, [r0] orr r1, #0x10000000 str r1, [r0] nop movs r3, #0x56 bx lrint_isr: nop movs r1, #0xf push {r1} bx lr.data.space 0x200, 0psp_stack_top:.space 0x400, 0msp_stack_top: