DSP concept guys say, that it's time to use ARM Cortex-M microcontrollers for embedded DSP systems, so I looked at CMSIS library of filtering functions, and found that it is of block type.
As you know, the most painful feature of ARM Cortex-M architecture is the lack of circular buffer addressing mode.
I cannot find an example of this functions application for continuous, real-time signal, because, as I guess, there is a big problem of input samples block gathering in a structure compatible with CMSIS FIR function. This should be done by a DMA controller, as we don't want to loose core clock, and this task is not easy. CMSIS FIR functions has internal state buffer which length equals to block_size+numOfTaps-1.
The function in multiple steps (=block_size/4) makes 4 samples copy from input buffer to state buffer (using core !!!), but after that, before next input block filtering the last numOfTaps-1 samples in state buffer must be moved to the beginning of this buffer.
It looks bad.
Maybe someone of you solved this problem and used this function in a real-time so, please, write me about that.
Thanks for sharing the above solution. My implementation follows the code pretty much exactly, except I have a much lower frequency with a slightly higher order filter.
I'm having trouble recovering the signal from the output arrays to present to the DAC. In the code above how the scaling to ADC in and scaling for DAC out might be in the external functions "read_sample" and "play_sample". This is where I am having an issue.
Essentially - what conditioning is required with the ADC signal *before* placing the sample(s) into the InputValues_A and InputValues_B buffers?
Conversely - what re-scaling or converting is required is required *after* taking sample(s) from the OutputValues_A and OutputValues_B buffers and sending them to the DAC? I understand the fact that ADC is uint16_t DAC is uint32_t, and the arrays are float32_t. But other than the casting for that what needs to be done?
In my case I present a fixed low frequency sine wave into the ADC at the center of my IIR bandpass filter. I am getting a signal out at the input frequency, but it is not scaled correctly and is shifted from the right DAC midpoint of 2048. No matter what I try to coerce or scale the output to, it results in the signal flattening or distorting.
Any feedback would be very appreciated, thank you!