My application creates a hardware break point after translation has been setup and the MMU has been enabled. When running inside ADS the break point exception is taken as expected. However when a FPV model form the command line the break point exception does not occur.
The following is some of the debug info from TarmacTrace
638024 clk cpu0 R DBGBVR0_EL1 00000000:00000024638356 clk cpu0 IT (319211) ffff000040003650:000040003650_NS d69f03e0 O EL1h_n : ERET
638473 clk cpu0 IT (319220) 00000020:000040400020_NS 314d8d56 O EL0t_n : ADDS w22,w10,#0x363,LSL #12638473 clk cpu0 R cpsr 00000000638473 clk cpu0 R X22 0000000050F44AD9638474 clk cpu0 IT (319221) 00000024:000040400024_NS b174c12b O EL0t_n : ADDS x11,x9,#0xd30,LSL #12638474 clk cpu0 R cpsr 00000000638474 clk cpu0 R X11 7D29EE085EAFBC1C638475 clk cpu0 IT (319222) 00000028:000040400028_NS 70c56aac O EL0t_n : ADR x12,0xfffffffffff8ad7f638475 clk cpu0 R X12 FFFFFFFFFFF8AD7F
Any ideas why the hardware break point would work inside ADS but not from the command line, and any tips to resolve the issue ?
The ADS version I'm using is developmentstudio_platinum-2025.a-1
Thanks.
Hi Stephen, thanks for the reply. I was able to debug the issue a bit more. As it turns out when running under the debugger reserved combinations of HMC, SSCE, SSC, and PMC in DBGBCR<n>_EL1 do not behave correctly.
The specific clause in the ARM ARM of interest is here is section D2.8.7.2 Reserved DBGBCR<n>_EL1.{SSCE, SSC, HMC, PMC} Table D2-12:
"All combinations with HMC set to 0, SSCE set to 0, and SSC set to 0b01 or 0b10. When Secure state is not implemented."
The observed behavior outside of the debugger was correct.