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Two SOCs speed comparison

Note: This was originally posted on 31st August 2011 at http://forums.arm.com

Hi,

I am new to ARM hardware, but trying to understand the speed difference between the two SOCs working at the same CPU frequency, yielding times different results.

Given these two devices:

1. OLPC XO 1.75, using Marvell Armada 610 SOC @ 800MHz, running Fedora Linux

2. Android tablet Pandigital Novel using Samsung S3C6410 @ 800 MHz., running Android 2.0

The same benchmark (Squeak Smalltalk tinyBenchmark [1]) was run on both, using the same Squeak VM interpreter code (well, maybe compiler versions and flags were slightly different, but this was GCC anyway).

Marvell yielded 45,000,000 bytecodes/sec; 1,600,000 sends/sec

while Samsung only 15,000,000/500,000 that is, three times slower.

See [2], [3] where this was discussed

Datasheet search shows that Samsung is ARMv6 [4], and Marvell is ARMv7 [5]

Is it the core version difference that results in such speed difference, or is that possibly the tablet firmware that throttles the CPU down?

I am the current developer of Squeak/Cog VM port to Android, and I collected information about the same benchmark that people ran on various Android devices [6].

It looks like another 800MHz device (Eken M009, VIA core) comes close to Pandigital, and all 1GHz devices show consistently higher speeds, yet this is below the OLPC results.

Thanks for any ideas.

-------------------------------------
[1] http://wiki.squeak.org/squeak/768
[2] http://lists.squeakf...ust/009262.html
[3] http://lists.squeakf...ust/009264.html
[4] http://pdadb.net/ind...samsung_s3c6410
[5] http://pdadb.net/ind...vell_armada_610
[6] http://code.google.c...i/TinyBenchmark
Parents
  • Note: This was originally posted on 1st September 2011 at http://forums.arm.com

    The biggest factors here are that the Samsung SoC has a scalar CPU with no 16/16KB L1 cache and no L2 cache, while the Marvell CPU is super-scalar with 32/32KB L1 cache and 256KB L2 cache. If I had to guess, the L2 cache is the single biggest contributor. On OMAP3530 I've seen a huge difference in performance between L2 disabled and enabled.

    Also, are you sure the Samsung SoC is running at 800MHz? The features documentation lists it as being capable of 533 or 667MHz.

    Software environment could have an impact too, but if you say you compiled the Android port with GCC I'm guessing this is native C/C++ and not Java. If it were Java code the difference in VM would make a huge difference; I've seen current JVMs beat current Dalvik by a wide margin.
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  • Note: This was originally posted on 1st September 2011 at http://forums.arm.com

    The biggest factors here are that the Samsung SoC has a scalar CPU with no 16/16KB L1 cache and no L2 cache, while the Marvell CPU is super-scalar with 32/32KB L1 cache and 256KB L2 cache. If I had to guess, the L2 cache is the single biggest contributor. On OMAP3530 I've seen a huge difference in performance between L2 disabled and enabled.

    Also, are you sure the Samsung SoC is running at 800MHz? The features documentation lists it as being capable of 533 or 667MHz.

    Software environment could have an impact too, but if you say you compiled the Android port with GCC I'm guessing this is native C/C++ and not Java. If it were Java code the difference in VM would make a huge difference; I've seen current JVMs beat current Dalvik by a wide margin.
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