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ARM DS-5: Getting Zeros on Some Counters

Xiaowan Dong
Note: This was originally posted on 15th August 2013 at http://forums.arm.com

Hi all,

When I run ARM streamline on ubuntu to collect statistics from Galaxy Nexus GT-I9250M, I got all zeros for some counters, including instruction executed, L1 cache miss and ITLB refill. I got the following warning in the analysis report of streamine:

[color=#3D3D3D]ARM Processor PMU event counters have been detected, however the event counters are reading zeroes. Event counters include those counters listed in the counter configuration options dialog under the core name but exclude the cycle counter (Clock:Cycles) as it is controlled by a dedicated counter. It is possible that the PMU configuration bit DBGEN has not been enabled, and counter values subsequently will always read as zero. To remedy, please update your firmware or Linux kernel to enable DBGEN.[/color]
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[color=#3D3D3D]I have tired all solutions I could find online (like [/color]https://community.freescale.com/thread/302685[color=#3D3D3D]), however, none of them work. [/color]
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[color=#3D3D3D]Any help would be greatly appreciated!  Thank you![/color]
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