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Debugging a Usage Fault for an unaligned memory access

Hi,

I am experiencing a hard fault in Cortex M3 and bit#30 FORCED is set in the Hard Fault Status Register (0xE000ED2C). Referring to the Cortex M3 Technical Reference Manual:

[color="#0000FF"][30] FORCED Hard Fault activated because a Configurable Fault was received and cannot activate because of priority or because the Configurable Fault is disabled. The Hard Fault handler then has to read the other fault status registers to determine cause.[/color]

The value in the Configurable Fault Status Registers (0xE000ED28) is 0x01000000 which means that the bit#8 UNALIGNED is set in the Usage Fault Status Register (0xE000ED2A) . Again referring to the Cortex M3 Technical Reference Manual:

[color="#0000FF"][8] UNALIGNED When UNALIGN_TRP is enabled (see Configuration Control Register on page 8-25), and there is an attempt to make an unaligned memory access, then this fault occurs. Unaligned LDM/STM/LDRD/STRD instructions always fault irrespective of the setting of UNALIGN_TRP.[/color]

The value in the Configuration Control Register (0xE000ED14) is 0x00000200 which means that only bit#9 STKALIGN is set.

After reading through the relevant topics in this forum, I added the following code snippet to narrow down the problem.

[font="Courier New"]void hard_fault_handler_c(unsigned int * hardfault_args)
{
unsigned int stacked_r0;
unsigned int stacked_r1;
unsigned int stacked_r2;
unsigned int stacked_r3;
unsigned int stacked_r12;
unsigned int stacked_lr;
unsigned int stacked_pc;
unsigned int stacked_psr;

stacked_r0 = ((unsigned long) hardfault_args[0]);
stacked_r1 = ((unsigned long) hardfault_args[1]);
stacked_r2 = ((unsigned long) hardfault_args[2]);
stacked_r3 = ((unsigned long) hardfault_args[3]);

stacked_r12 = ((unsigned long) hardfault_args[4]);
stacked_lr = ((unsigned long) hardfault_args[5]);
stacked_pc = ((unsigned long) hardfault_args[6]);
stacked_psr = ((unsigned long) hardfault_args[7]);

printf ("[Hard fault handler]\n");
printf ("R0 = %x\n", stacked_r0);
printf ("R1 = %x\n", stacked_r1);
printf ("R2 = %x\n", stacked_r2);
printf ("R3 = %x\n", stacked_r3);
printf ("R12 = %x\n", stacked_r12);
printf ("LR = %x\n", stacked_lr);
printf ("PC = %x\n", stacked_pc);
printf ("PSR = %x\n", stacked_psr);
printf ("BFAR = %x\n", (*((volatile unsigned long *)(0xE000ED38))));
printf ("CFSR = %x\n", (*((volatile unsigned long *)(0xE000ED28))));
printf ("HFSR = %x\n", (*((volatile unsigned long *)(0xE000ED2C))));
printf ("DFSR = %x\n", (*((volatile unsigned long *)(0xE000ED30))));
printf ("AFSR = %x\n", (*((volatile unsigned long *)(0xE000ED3C))));

while(1);
}

__asm void Hard_Fault_Handler(void)
{
IMPORT hard_fault_handler_c
TST LR, #4
ITE EQ
MRSEQ R0, MSP
MRSNE R0, PSP
B hard_fault_handler_c
}[/font]

However, I am still not able to figure out and point out the instruction which is causing the issue .

Any help will be very much appreciated. I can provide more information if needed.

Thank you.

Regards,

Parents

Brown Bud over 11 years ago

Note: This was originally posted on 14th May 2010 at http://forums.arm.com

Hi Joseph,

My apology for the late response. I was out-of-office for 2 days and couldn't access the Internet.

Yes, the screen shot was captured before the hard fault handler was executed.

I am using a custom OS. The strange thing is that the unaligned address in R12 is the address of the memory fault exception handler. This address is somehow populated into R12 when a prior instruction reads an address which is NULL (shouldn't be so). Actually this problem occurs, when after the watchdog reset, system reset ISR is being executed and later when the PSP is set and the application initialization function execution is in-progress (this is my guess), the PendSV exception handler is invoked. Is it due to the interrupts still enabled upon watchdog reset? I do disable interrupts in the beginning of the application initialization function. I understand that system reset ISR cannot be pre-empted by the PendSV handler. However, I am suspecting that the execution of system reset ISR + application initialization function is not atomic (should be so) when this happens and the PendSV exception handler is invoked before the interrupts are disabled inside the application initialization function. The application initialization function initializes a pointer which is read by the so-called prior instruction in the PendSV handler.

I am thinking of 2 ways as a workaround. 1) Make sure that interrupts are never enabled until the execution of application initialization is complete. 2) Return the PendSV handler gracefully if the pointer is NULL.

Please share your thoughts.

Thanks a lot for your help.

Regards,
Brown
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Brown Bud over 11 years ago

Note: This was originally posted on 14th May 2010 at http://forums.arm.com

Hi Joseph,

My apology for the late response. I was out-of-office for 2 days and couldn't access the Internet.

Yes, the screen shot was captured before the hard fault handler was executed.

I am using a custom OS. The strange thing is that the unaligned address in R12 is the address of the memory fault exception handler. This address is somehow populated into R12 when a prior instruction reads an address which is NULL (shouldn't be so). Actually this problem occurs, when after the watchdog reset, system reset ISR is being executed and later when the PSP is set and the application initialization function execution is in-progress (this is my guess), the PendSV exception handler is invoked. Is it due to the interrupts still enabled upon watchdog reset? I do disable interrupts in the beginning of the application initialization function. I understand that system reset ISR cannot be pre-empted by the PendSV handler. However, I am suspecting that the execution of system reset ISR + application initialization function is not atomic (should be so) when this happens and the PendSV exception handler is invoked before the interrupts are disabled inside the application initialization function. The application initialization function initializes a pointer which is read by the so-called prior instruction in the PendSV handler.

I am thinking of 2 ways as a workaround. 1) Make sure that interrupts are never enabled until the execution of application initialization is complete. 2) Return the PendSV handler gracefully if the pointer is NULL.

Please share your thoughts.

Thanks a lot for your help.

Regards,
Brown
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