Hi I'm interesting in profiling with ARM fast model.
As I understand, fast model doesn't suport cycle accurate profile.
So I'd like to estimate with fast model profile information.
1. How accurate streamline data, linux perf data with ARM fast model?
those profile shows I/D , L2 cache load/hit/miss number. Can I trust those numbers ?
2. If I trust those numbers, Can I calculate execution time with those numbers ?
for example,
- 1ns(1GHz) for CPU with cache access, 2ns(500Mhz) IO access
- elasped cycle 1000 cycle
- cache miss cycle 500 cycle - Total elasped time = 1000 cycle * 1ns + 500 cycle * 2ns = 2000 ns
I tried Cortex-A15 fast model. This only supply very limited information about PMU.
Cortex-A15 FastModel PMU suppies below 3 information
•Bus-Cycle-0x1D
•L1 Cache-Data Access – 0x4
•L1 Cache-Data TLB refill – 0x5
•L1 Cache INST TLB refill – 0x2
Does other Cortex-cores support additional information ?
if you enabled cores's cache model with L2, you will get more. the access pattern is correct, but there is no time info, you can take it as reference