I am trying to write on a register using the following command:
asm("ldr r0, =0x00");
asm("MSR ICC_SEIEN_EL1, r0") ;
and getting this error:
tmp/ccnn8Apc.s: Assembler messages:
/tmp/ccnn8Apc.s:93787: Error: selected processor does not support requested special purpose register -- `msr ICC_SEIEN_EL1,r0'
Can somebody help me in finding out the root cause of this issue.
Are you trying to assemble for AArch32? I'm guessing yes as you're referencing "r0".
FRom memory "ICC_SEIEN_EL1" is the name of the AArch64 register, you will need to refer to the register by it's AArch32 name. Also I think (don't have the manual to hand) that in AArch32 you should be using MCR instead of MSR.
Yes, I am working on AArch32.I have used the 32Arch equivalent using this code:
asm("MCR ICC_SEIEN, r0") ;
And now I am getting this error:
Error: bad or missing co-processor number -- `mcr ICC_SEIEN,r0'
Actually, I think MCR is not the right instruction. You should use MSR to copy a general purpose register to a special purpose register. I think it should then work.
Chris
Hi Chris,
Initially I was using MSR , but got error as explained above. But now I am using the following code:
asm("ldr r0, =0xFF");
asm("MCR p15,0,r0,c12,c13,0") ;
asm("MRC p15,0,r0,c12,c13,0"); the format is as defined in the Manual for ICC_SEI register for 32 bit architecture.
This one is not working either.
HI,
Apologies, I have confused you. Martin was right in his advice earlier to use MRC/MCR when accessing these registers in AArch32. Sorry about that.
I see that you have found the correct syntax for the MCR instruction. p15 is the coprocessor number which you were missing before. May I ask what error you are now seeing?
I have come to know that ICC_SEIEN has been removed from ARM architecture, do you know how do we control SEIs in the new architecture.