My question is related to Serial Wire Debug protocol.
1. SWD protocol : In the document (CoreSight components trm): ARM DDI 0314H, page 2-20,Fig 2-10, how RD[1] came to DAP bus before it could come at AHB bus? Can you please explain the read timing diagram in detail.
2. To do a SWD read, do we need to send read request twice, as the first read data is discarded?
Hi,
My colleagues are looking into whether that's a mistake in the diagram.
For further details of the SWD protocol you can refer to this doc: ARM Debug Interface Architecture Specification ADIv5.0 to ADIv5.2
You're required to log in to read the specification that I've linked you to. It may be useful in this case to contact ARM Support as well, so that they can make sure your question is addressed quickly.
Thanks,
Joe