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Question
L2 cache misses in Samsung Exynos 4 Quad using Streamline
Is it possible to measure PL310 events using the DS-5 Streamline? The target device is Samsung Galaxy S3 with Exynos 4 Quad SoC and Cortex A9 cores. The device runs Android.
-Dhinakaran
Answer
Yes, this should work fine when using a recent version of gator.
I'd recommend to use gator v17, shipped in DS-5 5.17.1 (latest), which can be downloaded here: ARM Development Studio 5
After installing DS-5, gator can be found here: <DS-5_install_path>/arm/gator
Then, you will have to re-build the gator driver and daemon by following these instructions.
The PL310 counters have to added in the Streamline Configuration Window.
I hope this helps.
Marcelo
Thanks Marcelo. I was able to access these counters. But, I have some doubts regarding the counter values.
I see that the L2 Data Read Requests counter of the PL310 L2 Cache controller is almost twice as L1 Data refills when the program that I am executing is mostly doing Loads. I would expect both these counters to report similar values. Am I missing something?
The PL310's Speculative Reads Received co-relates with the L1 Data refills, but the Data Read Requests counter doesn't.
Processor: ARM cortex A9 MPCore in Exynos 4412
This is the expected behaviour.
The DRREQ event (Data read request) corresponds to "Data read lookup to the L2 cache", so internal requests are performed in L2 to check whether a line is in L2 cache or not.
If 'data prefetch' is enabled, some additional reads are internally generated in the L2C-310 and therefore are more cache requests.
For more information, please check the L2C-310 TRM