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Can keil compiler translate C code into SIMD instructions(ARMv7-m)

Zhang Zhiyang


When we write such code as following, can keil compiler automaticly translate it into SIMD STM.

  do{

          *p++ = 1;

           *p++ = 1;

           *p++ = 1;

           *p++ = 1;

           *p++ = 1;

           *p++ = 1;

           *p++ = 1;

           *p++ = 1;

     }while( i-- );

We write code like this expecting STM can be used to do some optimization.

If the compiler can do this, what the option it need? I think this is not the default behaviour.

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  • 0 Arm Employee Badge

    Besides function entry and exit, armcc will use STM for structure copies:

    struct S { int a[4]; };
void f(int i, struct S* p) {
  const struct S s_ones = { { 1, 1, 1, 1 } }
  do {
    *p++ = s_ones;
  } while (i--);
}

    (and maybe for some memcpys)

    But the compiler won't find STMs from the code you gave (even when 'p' is 'int *'); and it won't auto-vectorize for the pre-NEON SIMD instructions like SHADD8 (on Cortex-M4), but you can use intrinsics to get them  http://infocenter.arm.com/help/topic/com.arm.doc.dui0491i/CJAGACAD.html

    [By the way, I don't usually consider STM a SIMD instruction, but I see what you mean.]

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  • 0 Arm Employee Badge

    Besides function entry and exit, armcc will use STM for structure copies:

    struct S { int a[4]; };
void f(int i, struct S* p) {
  const struct S s_ones = { { 1, 1, 1, 1 } }
  do {
    *p++ = s_ones;
  } while (i--);
}

    (and maybe for some memcpys)

    But the compiler won't find STMs from the code you gave (even when 'p' is 'int *'); and it won't auto-vectorize for the pre-NEON SIMD instructions like SHADD8 (on Cortex-M4), but you can use intrinsics to get them  http://infocenter.arm.com/help/topic/com.arm.doc.dui0491i/CJAGACAD.html

    [By the way, I don't usually consider STM a SIMD instruction, but I see what you mean.]

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